1. Field of the Invention
The present invention relates to an input buffer. More particularly, this invention relates to a low power input buffer. Still more particularly, this invention relates to a low power input buffer that is tolerant of a 5 volt input.
2. The Prior Art
Most electronic devices used in today's society are made up of many different integrated circuits. The integrated circuits in these devices are becoming denser as the dimensions of semiconductors components of the integrated circuits decrease. The decreased dimensions of the semiconductor components allow for faster devices that do not require as much power to operate. For example, many conventional components used to require 5 volts of power to operate. However, many current semiconductor components, such as transistors require approximately 3.3 volts to operate. The use of components having lower power requirements is important in mobile devices such as laptop computers and cellular telephones. The lower power allows a power supply in the device, such as a battery, to last longer and be smaller.
It is a problem that many devices still incorporate integrated circuits with the older high-powered components and integrated circuits with the new, lower power components. These devices may connect the lower power integrated circuits to high-powered integrated circuits. Thus, an integrated circuit operating on a lower voltage may receive an input at a higher voltage. This is a particular problem when an input of a higher voltage from a high voltage integrated circuit is applied to the lower voltage integrated circuit.
The particular problem is that the thin film oxide of the low voltage integrated circuit may suffer oxide breakdown from exposure to a voltage higher than the maximum supply voltage. This will cause catastrophic damage to the components of the low voltage integrated circuit.
One solution to this problem is shown by the input circuit 100 of FIG. 1. In input buffer circuit 100, high voltage integrated circuit 101 applies high voltage signals to path 102. An N-channel transistor 110 is connected to path 102 to prevent damage to the lower power integrated circuit. A source of transistor 110 connects to path 102. A drain of transistor 110 connects to path 103. A gate of transistor 110 connects to a supply voltage VDD via path 104. In this exemplary embodiment, the supply voltage VDD is 3.3 volts and the input signals are 5 volts.
Path 103 connects the drain of transistor 110 to the input buffer. In this exemplary prior art embodiment, the input buffer is an inverter 106. Inverter 106 is powered by supply voltage Vdd via path 113.
A high voltage signal from high voltage integrated circuit 101 causes transistor 110 to pinch off when the input voltage exceeds a gate voltage, Vg minus a threshold voltage, Vth. In this exemplary embodiment, the threshold voltage, Vth, is 0.6 volts. Therefore, the pinch off voltage passed through transistor 110 is 2.7 volts.
It is a problem with circuit 100 that the highest voltage that may pass through transistor 110 is the pinch off voltage. This causes inverter 106 to be partially biased. Thus, a static “totem pole” current is caused when the input signal from the integrated circuit 101 is high.
FIG. 2 illustrates a prior art buffer circuit 200 in which a pull-up device is added to path 103 in order to prevent a “totem pole” current flow. The pull-up device is P-channel pull-up transistor 220. The source of pull-up transistor 220 is connected to path 103 from the drain of transistor 110. The drain of pull-up transistor 220 is connected to a power supply, Vdd, via path 210. The gate of transistor 220 is connected to the output of inverter 106 via path 221. This allows the pull-up of transistor 220 to be controlled by the output of the input buffer.
It is a problem with circuit 200 that when the input from high voltage integrated circuit 101 transitions from low to high, there is a mid-range voltage at which the input buffer changes state which causes voltage to be applied to the gate of transistor 220. The application of voltage opens transistor 220. This may cause a violation of input leakage specifications that are typically 10 μamps.
Thus, there is a need in the art for a low power input buffer tolerant of high voltages that solves the above and other problems.